Optimizing energy efficiency of 3-D multicore systems with stacked DRAM under power and thermal constraints”, DAC

3D multicore systems with stacked DRAM have the poten-tial to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the power budget or create thermal hot spots. This paper in-troduces a framework to model on-chip DRAM accesses and analyzes performance, power, and temperature tradeoffs of 3D systems. We propose a runtime optimization policy to maximize performance while maintaining power and ther-mal constraints. Our policy dynamically monitors workload behavior and selects among low-power and turbo operating modes accordingly. Experiments with multithreaded work-loads demonstrate up to 49 % energy efficiency improvements compared to existing thermal management policies